arm_shift_q7.c
Go to the documentation of this file.
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2011 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. December 2011 00005 * $Revision: V2.0.0 00006 * 00007 * Project: Cortex-R DSP Library 00008 * Title: arm_shift_q7.c 00009 * 00010 * Description: Processing function for the Q7 Shifting 00011 * 00012 * Target Processor: Cortex-R4/R5 00013 * 00014 * Version 1.0.0 2011/03/08 00015 * Alpha release. 00016 * 00017 * Version 1.0.1 2011/09/30 00018 * Beta release. 00019 * 00020 * Version 2.0.0 2011/12/15 00021 * Final release. 00022 * 00023 * -------------------------------------------------------------------- */ 00024 #include "arm_math.h" 00025 00054 void arm_shift_q7( 00055 q7_t * pSrc, 00056 int8_t shiftBits, 00057 q7_t * pDst, 00058 uint32_t blockSize) 00059 { 00060 uint32_t blkCnt; /* loop counter */ 00061 uint8_t sign; /* Sign of shiftBits */ 00062 q7_t in1; /* Input value1 */ 00063 q7_t in2; /* Input value2 */ 00064 q7_t in3; /* Input value3 */ 00065 q7_t in4; /* Input value4 */ 00066 00067 00068 /*loop Unrolling */ 00069 blkCnt = blockSize >> 3u; 00070 00071 /* Getting the sign of shiftBits */ 00072 sign = (shiftBits & 0x80); 00073 00074 /* If the shift value is positive then do right shift else left shift */ 00075 if(sign == 0u) 00076 { 00077 /* First part of the processing with loop unrolling. Compute 8 outputs at a time. 00078 ** a second loop below computes the remaining 1 to 7 samples. */ 00079 while(blkCnt > 0u) 00080 { 00081 /* C = A << shiftBits */ 00082 /* Read 4 inputs */ 00083 in1 = *pSrc; 00084 in2 = *(pSrc + 1); 00085 in3 = *(pSrc + 2); 00086 in4 = *(pSrc + 3); 00087 00088 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ 00089 #ifdef CCS 00090 *__SIMD32(pDst)++ = __PACKq7(__SSATA((in1 << shiftBits), 0, 8), 00091 __SSATA((in2 << shiftBits), 0, 8), 00092 __SSATA((in3 << shiftBits), 0, 8), 00093 __SSATA((in4 << shiftBits), 0, 8)); 00094 #else 00095 *__SIMD32(pDst)++ = __PACKq7(__SSAT16((in1 << shiftBits), 8), 00096 __SSAT16((in2 << shiftBits), 8), 00097 __SSAT16((in3 << shiftBits), 8), 00098 __SSAT16((in4 << shiftBits), 8)); 00099 #endif // #ifdef CCS 00100 00101 in1 = *(pSrc + 4); 00102 in2 = *(pSrc + 5); 00103 in3 = *(pSrc + 6); 00104 in4 = *(pSrc + 7); 00105 00106 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ 00107 #ifdef CCS 00108 *__SIMD32(pDst)++ = __PACKq7(__SSATA((in1 << shiftBits), 0, 8), 00109 __SSATA((in2 << shiftBits), 0, 8), 00110 __SSATA((in3 << shiftBits), 0, 8), 00111 __SSATA((in4 << shiftBits), 0, 8)); 00112 #else 00113 *__SIMD32(pDst)++ = __PACKq7(__SSAT16((in1 << shiftBits), 8), 00114 __SSAT16((in2 << shiftBits), 8), 00115 __SSAT16((in3 << shiftBits), 8), 00116 __SSAT16((in4 << shiftBits), 8)); 00117 #endif // #ifdef CCS 00118 00119 /* Update source pointer to process next sampels */ 00120 pSrc += 8u; 00121 00122 /* Decrement the loop counter */ 00123 blkCnt--; 00124 } 00125 00126 /* If the blockSize is not a multiple of 8, compute any remaining output samples here. 00127 ** No loop unrolling is used. */ 00128 blkCnt = blockSize % 0x8u; 00129 00130 while(blkCnt > 0u) 00131 { 00132 /* C = A << shiftBits */ 00133 /* Shift the input and then store the result in the destination buffer. */ 00134 #ifdef CCS 00135 *pDst++ = (q7_t) __SSATA((*pSrc++ << shiftBits), 0, 8); 00136 #else 00137 *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8); 00138 #endif // #ifdef CCS 00139 00140 /* Decrement the loop counter */ 00141 blkCnt--; 00142 } 00143 } 00144 else 00145 { 00146 shiftBits = -shiftBits; 00147 /* First part of the processing with loop unrolling. Compute 8 outputs at a time. 00148 ** a second loop below computes the remaining 1 to 7 samples. */ 00149 while(blkCnt > 0u) 00150 { 00151 /* C = A >> shiftBits */ 00152 /* Read 4 inputs */ 00153 in1 = *pSrc; 00154 in2 = *(pSrc + 1); 00155 in3 = *(pSrc + 2); 00156 in4 = *(pSrc + 3); 00157 00158 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ 00159 *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits), 00160 (in3 >> shiftBits), (in4 >> shiftBits)); 00161 00162 in1 = *(pSrc + 4); 00163 in2 = *(pSrc + 5); 00164 in3 = *(pSrc + 6); 00165 in4 = *(pSrc + 7); 00166 00167 /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */ 00168 *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits), 00169 (in3 >> shiftBits), (in4 >> shiftBits)); 00170 00171 pSrc += 8u; 00172 00173 /* Decrement the loop counter */ 00174 blkCnt--; 00175 } 00176 00177 /* If the blockSize is not a multiple of 8, compute any remaining output samples here. 00178 ** No loop unrolling is used. */ 00179 blkCnt = blockSize % 0x8u; 00180 00181 while(blkCnt > 0u) 00182 { 00183 /* C = A >> shiftBits */ 00184 /* Shift the input and then store the result in the destination buffer. */ 00185 in1 = *pSrc++; 00186 *pDst++ = (in1 >> shiftBits); 00187 00188 /* Decrement the loop counter */ 00189 blkCnt--; 00190 } 00191 } 00192 } 00193
