arm_mult_q15.c
Go to the documentation of this file.
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2011 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. December 2011 00005 * $Revision: V2.0.0 00006 * 00007 * Project: Cortex-R DSP Library 00008 * Title: arm_mult_q15.c 00009 * 00010 * Description: Q15 vector multiplication. 00011 * 00012 * Target Processor: Cortex-R4/R5 00013 * 00014 * Version 1.0.0 2011/03/08 00015 * Alpha release. 00016 * 00017 * Version 1.0.1 2011/09/30 00018 * Beta release. 00019 * 00020 * Version 2.0.0 2011/12/15 00021 * Final release. 00022 * 00023 * -------------------------------------------------------------------- */ 00024 00025 #include "arm_math.h" 00026 00055 void arm_mult_q15( 00056 q15_t * pSrcA, 00057 q15_t * pSrcB, 00058 q15_t * pDst, 00059 uint32_t blockSize) 00060 { 00061 uint32_t blkCnt; /* loop counters */ 00062 q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ 00063 q15_t out1, out2, out3, out4; /* temporary output variables */ 00064 q31_t mul1, mul2, mul3, mul4; /* temporary variables */ 00065 00066 /* loop Unrolling */ 00067 blkCnt = blockSize >> 2u; 00068 00069 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00070 ** a second loop below computes the remaining 1 to 3 samples. */ 00071 while(blkCnt > 0u) 00072 { 00073 /* read two samples at a time from sourceA */ 00074 inA1 = *__SIMD32(pSrcA)++; 00075 /* read two samples at a time from sourceB */ 00076 inB1 = *__SIMD32(pSrcB)++; 00077 /* read two samples at a time from sourceA */ 00078 inA2 = *__SIMD32(pSrcA)++; 00079 /* read two samples at a time from sourceB */ 00080 inB2 = *__SIMD32(pSrcB)++; 00081 00082 /* multiply mul = sourceA * sourceB */ 00083 mul1 = (q31_t)((q15_t)(inA1 >> 16)* (q15_t)(inB1>> 16)); 00084 mul2 = (q31_t)((q15_t)inA1 * (q15_t)inB1); 00085 mul3 = (q31_t)((q15_t)(inA2 >> 16)* (q15_t)(inB2>> 16)); 00086 mul4 = (q31_t)((q15_t)inA2 * (q15_t)inB2); 00087 00088 /* shift result by 15 to get 16 bit result */ 00089 mul1 = mul1 >> 15; 00090 mul2 = mul2 >> 15; 00091 mul3 = mul3 >> 15; 00092 mul4 = mul4 >> 15; 00093 00094 /* saturate result to 16 bit */ 00095 #ifdef CCS 00096 00097 out1 = (q15_t) __SSATA(mul1, 0, 16); 00098 out2 = (q15_t) __SSATA(mul2, 0, 16); 00099 out3 = (q15_t) __SSATA(mul3, 0, 16); 00100 out4 = (q15_t) __SSATA(mul4, 0, 16); 00101 00102 #else 00103 00104 out1 = (q15_t) __SSAT(mul1, 16); 00105 out2 = (q15_t) __SSAT(mul2, 16); 00106 out3 = (q15_t) __SSAT(mul3, 16); 00107 out4 = (q15_t) __SSAT(mul4, 16); 00108 00109 #endif // #ifdef CCS 00110 00111 /* store the result */ 00112 #ifndef ARM_MATH_BIG_ENDIAN 00113 00114 *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); 00115 *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); 00116 00117 #else 00118 00119 *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); 00120 *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); 00121 00122 #endif // #ifndef ARM_MATH_BIG_ENDIAN 00123 00124 /* Decrement the blockSize loop counter */ 00125 blkCnt--; 00126 } 00127 00128 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00129 ** No loop unrolling is used. */ 00130 blkCnt = blockSize % 0x4u; 00131 00132 while(blkCnt > 0u) 00133 { 00134 /* C = A * B */ 00135 /* Multiply the inputs and store the result in the destination buffer */ 00136 #ifdef CCS 00137 *pDst++ = (q15_t) __SSATA((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 0, 16); 00138 #else 00139 *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); 00140 #endif // #ifdef CCS 00141 /* Decrement the blockSize loop counter */ 00142 blkCnt--; 00143 } 00144 } 00145
