00001 /*----------------------------------------------------------------------------- 00002 * Copyright (C) 2011 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. December 2011 00005 * $Revision: V2.0.0 00006 * 00007 * Project: Cortex-R DSP Library 00008 * Title: arm_biquad_cascade_df1_init_q15.c 00009 * 00010 * Description: Q15 Biquad cascade DirectFormI(DF1) filter initialization function. 00011 * 00012 * Target Processor: Cortex-R4/R5 00013 * 00014 * Version 1.0.0 2011/03/08 00015 * Alpha release. 00016 * 00017 * Version 1.0.1 2011/09/30 00018 * Beta release. 00019 * 00020 * Version 2.0.0 2011/12/15 00021 * Final release. 00022 * 00023 * ---------------------------------------------------------------------------*/ 00024 00025 #include "arm_math.h" 00026 00070 void arm_biquad_cascade_df1_init_q15( 00071 arm_biquad_casd_df1_inst_q15 * S, 00072 uint8_t numStages, 00073 q15_t * pCoeffs, 00074 q15_t * pState, 00075 int8_t postShift) 00076 { 00077 /* Assign filter stages */ 00078 S->numStages = numStages; 00079 00080 /* Assign postShift to be applied to the output */ 00081 S->postShift = postShift; 00082 00083 /* Assign coefficient pointer */ 00084 S->pCoeffs = pCoeffs; 00085 00086 /* Clear state buffer and size is always 4 * numStages */ 00087 memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t)); 00088 00089 /* Assign state pointer */ 00090 S->pState = pState; 00091 } 00092