00001 /*----------------------------------------------------------------------------- 00002 * Copyright (C) 2011 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. December 2011 00005 * $Revision: V2.0.0 00006 * 00007 * Project: Cortex-R DSP Library 00008 * Title: arm_biquad_cascade_df1_init_f32.c 00009 * 00010 * Description: floating-point Biquad cascade DirectFormI(DF1) filter initialization function. 00011 * 00012 * Target Processor: Cortex-R4/R5 00013 * 00014 * Version 1.0.0 2011/03/08 00015 * Alpha release. 00016 * 00017 * Version 1.0.1 2011/09/30 00018 * Beta release. 00019 * 00020 * Version 2.0.0 2011/12/15 00021 * Final release. 00022 * 00023 * ---------------------------------------------------------------------------*/ 00024 00025 #include "arm_math.h" 00026 00072 void arm_biquad_cascade_df1_init_f32( 00073 arm_biquad_casd_df1_inst_f32 * S, 00074 uint8_t numStages, 00075 float32_t * pCoeffs, 00076 float32_t * pState) 00077 { 00078 /* Assign filter stages */ 00079 S->numStages = numStages; 00080 00081 /* Assign coefficient pointer */ 00082 S->pCoeffs = pCoeffs; 00083 00084 /* Clear state buffer and size is always 4 * numStages */ 00085 memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t)); 00086 00087 /* Assign state pointer */ 00088 S->pState = pState; 00089 } 00090